A memory system includes: a memory device, including a plurality of memory cells, suitable for reading and writing data with a parity bit on a basis of a page; and a memory controller suitable for obtaining an error mask pattern based on compressed data when a number of error bits detected based on the data and the parity bit is equal to or less than a first threshold value and greater than a second threshold value, and controlling to write the compressed data, the parity bit updated based on the compressed data in which the error mask pattern is reflected, compression information on the compressed data and pattern information on the error mask pattern to the page.