Invention Grant
- Patent Title: Implementing a micro-operation cache with compaction
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Application No.: US16297358Application Date: 2019-03-08
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Publication No.: US11016763B2Publication Date: 2021-05-25
- Inventor: Jagadish B. Kotra , John Kalamatianos
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Kowert Hood Munyon Rankin and Goetzel PC
- Agent Rory D. Rankin
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/22 ; G06F12/0875 ; G06F9/30

Abstract:
Systems, apparatuses, and methods for compacting multiple groups of micro-operations into individual cache lines of a micro-operation cache are disclosed. A processor includes at least a decode unit and a micro-operation cache. When a new group of micro-operations is decoded and ready to be written to the micro-operation cache, the micro-operation cache determines which set is targeted by the new group of micro-operations. If there is a way in this set that can store the new group without evicting any existing group already stored in the way, then the new group is stored into the way with the existing group(s) of micro-operations. Metadata is then updated to indicate that the new group of micro-operations has been written to the way. Additionally, the micro-operation cache manages eviction and replacement policy at the granularity of micro-operation groups rather than at the granularity of cache lines.
Public/Granted literature
- US20200285466A1 IMPLEMENTING A MICRO-OPERATION CACHE WITH COMPACTION Public/Granted day:2020-09-10
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