Invention Grant
- Patent Title: Method and apparatus to efficiently track locations of dirty cache lines in a cache in a two-level main memory
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Application No.: US16278509Application Date: 2019-02-18
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Publication No.: US11074188B2Publication Date: 2021-07-27
- Inventor: Zhe Wang , Alaa R. Alameldeen , Lidia Warnes , Andy M. Rudoff , Muthukumar P. Swaminathan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law, PC
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0891 ; G06F12/02 ; G06F12/0893

Abstract:
A two-level main memory that includes a persistent memory and a cache is provided. Locations of dirty cache lines in the cache are tracked through the use a dirty cache line tracker. The dirty cache line tracker is stored in the cache and can be cached in a memory controller for the persistent memory. The dirty cache line tracker can be used to bypass cache lookup, perform efficient dirty cache line scrubbing and to decouple battery power and capacity of the cache in the two-level main memory.
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