Invention Grant
- Patent Title: Linear to physical address translation with support for page attributes
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Application No.: US15803244Application Date: 2017-11-03
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Publication No.: US11074191B2Publication Date: 2021-07-27
- Inventor: Ben-Zion Friedman , Jacob Doweck , Eliezer Weissmann , James B. Crossland , Ohad Falik
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/1009 ; G06F12/1027 ; G06F12/10 ; G06F12/1036

Abstract:
Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.
Public/Granted literature
- US20180060246A1 LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIBUTES Public/Granted day:2018-03-01
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