Invention Grant
- Patent Title: Integrated circuit with guard ring
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Application No.: US16207041Application Date: 2018-11-30
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Publication No.: US11081444B2Publication Date: 2021-08-03
- Inventor: Chiao-Han Lee , Hsien-Yuan Liao , Ying-Ta Lu , Chi-Hsien Lin , Ho-Hsiang Chen , Tzu-Jin Yeh
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L49/02 ; H01L23/58 ; H01L23/528 ; H01L23/00 ; H01L23/64

Abstract:
An integrated circuit includes an inductor over a substrate and a guard ring surrounding the inductor. The guard ring includes a first staggered line, a first metal line extending in a first direction and a second metal line extending in a second direction different from the first direction. The first staggered line has a first end coupled to the first metal line, and a second end coupled to the second metal line. The first staggered line includes a first set of vias, a first set of metal lines in a first metal layer and a second set of metal lines in a second metal layer different from the first metal layer. The first set of vias coupling the first set of metal lines with the second of second metal lines.
Public/Granted literature
- US20190103354A1 INTEGRATED CIRCUIT WITH GUARD RING Public/Granted day:2019-04-04
Information query
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