- Patent Title: Via structure with low resistivity and method for forming the same
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Application No.: US16907781Application Date: 2020-06-22
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Publication No.: US11081585B2Publication Date: 2021-08-03
- Inventor: Kuo-Chiang Tsai , Fu-Hsiang Su , Ke-Jing Yu , Chih-Hong Hwang , Jyh-Huei Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/423 ; H01L29/417 ; H01L21/48 ; H01L21/768 ; H01L23/522

Abstract:
A semiconductor device structure is provided. The semiconductor device structure includes an insulating layer over a substrate, a gate stack formed in the insulating layer, and an insulating capping layer formed in the insulating layer to cover the gate stack. The semiconductor device structure also includes a source/drain contact structure adjacent to the gate stack. The source/drain contact structure has a sidewall that is in direct contact with a sidewall of the insulating capping layer, and an upper surface that is substantially level with an upper surface of the insulating capping layer and an upper surface of the insulating layer. In addition, the semiconductor device structure includes a first via structure above and electrically connected to the gate stack and a second via structure above and electrically connected to the source/drain contact structure.
Public/Granted literature
- US20200321460A1 VIA STRUCTURE WITH LOW RESISTIVITY AND METHOD FOR FORMING THE SAME Public/Granted day:2020-10-08
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