Invention Grant
- Patent Title: Fine feature formation techniques for printed circuit boards
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Application No.: US16081487Application Date: 2016-04-02
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Publication No.: US11089689B2Publication Date: 2021-08-10
- Inventor: Eric Li , Kemal Aygun , Kai Xiao , Gong Ouyang , Zhichao Zhang
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Kacvinsky Daisak Bluni PLLC
- International Application: PCT/US2016/025772 WO 20160402
- International Announcement: WO2017/171884 WO 20171005
- Main IPC: H05K3/00
- IPC: H05K3/00 ; H05K3/02 ; H05K1/02 ; H05K3/46

Abstract:
Fine feature formation techniques for printed circuit boards are described. In one embodiment, for example, a method may comprise fabricating a conductive structure 306 on a low density interconnect (LDI) printed circuit board (PCB) 150 according to an LDI fabrication process and forming one or more fine conductive features on the LDI PCB by performing a fine feature formation (FFF) process, the FFF process to comprise removing conductive material of the conductive structure along an excision path to form a fine gap region 308 within the conductive structure. Other embodiments are described and claimed.
Public/Granted literature
- US20190098764A1 FINE FEATURE FORMATION TECHNIQUES FOR PRINTED CIRCUIT BOARDS Public/Granted day:2019-03-28
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