- 专利标题: Optimal operating point estimator for hardware operating under a shared power/thermal constraint
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申请号: US16179620申请日: 2018-11-02
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公开(公告)号: US11106261B2公开(公告)日: 2021-08-31
- 发明人: Aniket Naik , Siddharth Bhargav , Bardia Zandian , Narayan Kulshrestha , Amit Pabalkar , Arvind Gopalakrishnan , Justin Tai , Sachin Satish Idgunji
- 申请人: NVIDIA Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: NVIDIA Corporation
- 当前专利权人: NVIDIA Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Zilka-Kotab, P.C.
- 主分类号: G06F1/00
- IPC分类号: G06F1/00 ; G06F1/26 ; G06F1/3206 ; G06F9/50 ; G06F1/3296 ; G06F1/28 ; G06N20/00 ; G06N5/04
摘要:
Integrated circuits, or computer chips, typically include multiple hardware components (e.g. memory, processors, etc.) operating under a shared power (e.g. thermal) constraint that is sourced by one or more power sources for the chip. Typically, the hardware components can be individually configured to operate at certain states (e.g. to operate at a certain frequency by setting a clock speed for a clock dedicated to the hardware component). Thus, each hardware component can be configured to operate at an operating point that is determined to be optimal, usually in terms of achieving some desired goal for a specific application (e.g. frame rates for gaming, etc.). In the context of chip hardware that operates under a shared power/thermal constraint, a method, computer readable medium, and system are provided for determining the optimal operating point for the chip that takes into consideration both performance of the chip and power consumption by the chip.
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