Invention Grant
- Patent Title: On-chip resistor trimming to compensate for process variation
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Application No.: US16668023Application Date: 2019-10-30
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Publication No.: US11107613B2Publication Date: 2021-08-31
- Inventor: Mohit Kaushik , Anil Kumar
- Applicant: STMicroelectronics International N.V.
- Applicant Address: NL Schiphol
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: NL Schiphol
- Agency: Crowe & Dunlevy
- Main IPC: H01C17/26
- IPC: H01C17/26 ; H01L21/66

Abstract:
A resistance trimming circuit has a resolution of N=X+Y bits. Included is a first circuit with M resistors, where M=2X−1, with each of the M resistors having a resistance of R*(2Y)*i, i being an index having a value ranging from 1 to 2X−1. M switches are associated with the M resistors. Each of the M resistors is coupled between a first node and its one of the M switches, and each of the M switches couples its one of the M resistors to a second node. Included is a second circuit with P resistors, where P=2Y−1, with each of the P resistors having a resistance of R*i. P switches are associated with the P resistors. Each of the P resistors is coupled between the second node and its one of the P switches, and each of the P switches selectively couples its one of the P resistors to a third node.
Public/Granted literature
- US20200161031A1 ON-CHIP RESISTOR TRIMMING TO COMPENSATE FOR PROCESS VARIATION Public/Granted day:2020-05-21
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