- 专利标题: Memory systems and methods of correcting errors in the memory systems
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申请号: US16726693申请日: 2019-12-24
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公开(公告)号: US11108412B2公开(公告)日: 2021-08-31
- 发明人: Won Gyu Shin , Jin Woong Suh
- 申请人: SK hynix Inc.
- 申请人地址: KR Icheon-si
- 专利权人: SK hynix Inc.
- 当前专利权人: SK hynix Inc.
- 当前专利权人地址: KR Icheon-si
- 代理机构: William Park & Associates Ltd.
- 优先权: KR10-2019-0063100 20190529
- 主分类号: H03M13/15
- IPC分类号: H03M13/15 ; G06F9/30 ; G06F11/10 ; H03M13/11
摘要:
A memory system includes a Reed-Solomon (RS) decoder, a reliability tracking circuit, and an erasure control circuit. The RS decoder performs an error correction decoding operation of ‘K’-number of symbols outputted from a memory medium. The reliability tracking circuit generates and stores information on a reliability of the symbols, error occurrence possibilities of which are distinguished into a plurality of different levels according to the error correction decoding operation performed by the RS decoder. The erasure control circuit controls the RS decoder such that the symbols are erased in order of the reliability of the symbols from a low reliable symbol to a high reliable symbol and the error correction decoding operation is performed according to the information on the reliability of the symbols stored in the reliability tracking circuit.
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