Invention Grant
- Patent Title: Memory systems and methods of correcting errors in the memory systems
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Application No.: US16726693Application Date: 2019-12-24
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Publication No.: US11108412B2Publication Date: 2021-08-31
- Inventor: Won Gyu Shin , Jin Woong Suh
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2019-0063100 20190529
- Main IPC: H03M13/15
- IPC: H03M13/15 ; G06F9/30 ; G06F11/10 ; H03M13/11

Abstract:
A memory system includes a Reed-Solomon (RS) decoder, a reliability tracking circuit, and an erasure control circuit. The RS decoder performs an error correction decoding operation of ‘K’-number of symbols outputted from a memory medium. The reliability tracking circuit generates and stores information on a reliability of the symbols, error occurrence possibilities of which are distinguished into a plurality of different levels according to the error correction decoding operation performed by the RS decoder. The erasure control circuit controls the RS decoder such that the symbols are erased in order of the reliability of the symbols from a low reliable symbol to a high reliable symbol and the error correction decoding operation is performed according to the information on the reliability of the symbols stored in the reliability tracking circuit.
Public/Granted literature
- US20200382137A1 MEMORY SYSTEMS AND METHODS OF CORRECTNG ERRORS IN THE MEMORY SYSTEMS Public/Granted day:2020-12-03
Information query
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