Invention Grant
- Patent Title: Technologies for controlling jitter at network packet egress
-
Application No.: US15942023Application Date: 2018-03-30
-
Publication No.: US11108697B2Publication Date: 2021-08-31
- Inventor: Chih-Jen Chang , Robert Southworth , Naru Dames Sundar , Yue Yang , Charles Michael Atkin , John Leshchuk
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law, PC
- Main IPC: H04L12/26
- IPC: H04L12/26 ; H04L12/819 ; H04L12/813 ; H04L12/721

Abstract:
Technologies for controlling jitter at network packet egress at a source computing device include determining a switch time delta as a difference between a present switch time and a previously captured switch time upon receipt of a network packet scheduled for transmission to a target computing device and determining a host scheduler time delta as a difference between a host scheduler timestamp associated with the received network packet and a previously captured host scheduler timestamp. The source computing device is additionally configured to determine an amount of previously captured tokens present in a token bucket, determine whether there are a sufficient number of tokens available in the token bucket to transmit the received packet as a function of the switch time delta, the host scheduler time delta, and the amount of previously captured tokens present in the token bucket, and schedule the received network packet for transmission upon a determination that sufficient tokens in the token bucket.
Public/Granted literature
- US20190044867A1 TECHNOLOGIES FOR CONTROLLING JITTER AT NETWORK PACKET EGRESS Public/Granted day:2019-02-07
Information query