公开(公告)号：US11108697B2

公开(公告)日：2021-08-31

申请号：US15942023

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Chih-Jen Chang ,  Robert Southworth ,  Naru Dames Sundar ,  Yue Yang ,  Charles Michael Atkin ,  John Leshchuk

IPC: H04L12/26 ,  H04L12/819 ,  H04L12/813 ,  H04L12/721

Abstract: Technologies for controlling jitter at network packet egress at a source computing device include determining a switch time delta as a difference between a present switch time and a previously captured switch time upon receipt of a network packet scheduled for transmission to a target computing device and determining a host scheduler time delta as a difference between a host scheduler timestamp associated with the received network packet and a previously captured host scheduler timestamp. The source computing device is additionally configured to determine an amount of previously captured tokens present in a token bucket, determine whether there are a sufficient number of tokens available in the token bucket to transmit the received packet as a function of the switch time delta, the host scheduler time delta, and the amount of previously captured tokens present in the token bucket, and schedule the received network packet for transmission upon a determination that sufficient tokens in the token bucket.

公开(公告)号：US20240172393A1

公开(公告)日：2024-05-23

申请号：US18428991

申请日：2024-01-31

Applicant: Intel Corporation

Inventor： Sandeep Ahuja ,  Yang Yao ,  Ming Zhang ,  Yuehong Fan ,  Xiang Que ,  Mark MacDonald ,  Casey Jamesen Carte ,  Yue Yang ,  Eric D. McAfee ,  Satyam Saini ,  Suchismita Sarangi ,  Drew Damm ,  Jessica Gullbrand

IPC: H05K7/20

CPC classification number: H05K7/20272 ,  H05K7/20236 ,  H05K7/20772

Abstract: Methods and apparatus for immersion cooling systems are disclosed herein. An example apparatus includes a base plate, fins extending from the base plate, a tube extending along an axis through the fins, the tube including an inlet, and a slot extending along the axis, the inlet, the slot, and the fins sequentially defining a flow pathway.

公开(公告)号：US20190044867A1

公开(公告)日：2019-02-07

申请号：US15942023

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Chih-Jen Chang ,  Robert Southworth ,  Naru Dames Sundar ,  Yue Yang ,  Charles Michael Atkin ,  John Leshchuk

IPC: H04L12/819 ,  H04L12/26 ,  H04L12/813

Abstract: Technologies for controlling jitter at network packet egress at a source computing device include determining a switch time delta as a difference between a present switch time and a previously captured switch time upon receipt of a network packet scheduled for transmission to a target computing device and determining a host scheduler time delta as a difference between a host scheduler timestamp associated with the received network packet and a previously captured host scheduler timestamp. The source computing device is additionally configured to determine an amount of previously captured tokens present in a token bucket, determine whether there are a sufficient number of tokens available in the token bucket to transmit the received packet as a function of the switch time delta, the host scheduler time delta, and the amount of previously captured tokens present in the token bucket, and schedule the received network packet for transmission upon a determination that sufficient tokens in the token bucket.

公开(公告)号：US10812402B2

公开(公告)日：2020-10-20

申请号：US16236127

申请日：2018-12-28

Applicant: INTEL CORPORATION

Inventor： Robert Southworth ,  Ben-Zion Friedman ,  Robert Munoz ,  Sarig Livne ,  Chih-Jen Chang ,  Yue Yang ,  Partick Fleming

IPC: H04L12/841 ,  H04L12/26 ,  H04L12/927 ,  H04L12/819 ,  H04L12/815 ,  H04L12/813 ,  H04J3/06

Abstract: Apparatuses and methods for managing jitter resulting from processing through a network interface pipeline are disclosed. In embodiments, a network traffic scheduler annotates packets to be transmitted over a bandwidth-limited network connection with time relationship information to ensure downstream bandwidth limitations are not violated. Following processing through a network interface pipeline, a jitter shaper inspects the annotated time relationship information and pipeline-imposed delays and, by imposing a variable delay, reestablishes bandwidth-complaint time relationships based upon the annotated time relationship information and configured tolerances.