Invention Grant
- Patent Title: Semiconductor layered device with data bus
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Application No.: US16459439Application Date: 2019-07-01
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Publication No.: US11120849B2Publication Date: 2021-09-14
- Inventor: Chikara Kondo , Chiaki Dono
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C5/02 ; G11C5/06 ; G11C7/22 ; G06F13/42

Abstract:
Apparatuses and methods of data communication between semiconductor chips are described. An example apparatus includes: a first semiconductor chip and a second semiconductor chips that are stacked with each other via through substrate vias (TSVs) provided in one of the first semiconductor chip and the second semiconductor chip. The first semiconductor chip and the second semiconductor chips communicate with each other by use of data bus inversion data that have been encoded using a DBI algorithm.
Public/Granted literature
- US20190325926A1 SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS Public/Granted day:2019-10-24
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