Invention Grant
- Patent Title: Dynamic error handling in a memory system
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Application No.: US15914858Application Date: 2018-03-07
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Publication No.: US11126495B2Publication Date: 2021-09-21
- Inventor: Renato Padilla, Jr. , Gary F. Besinga , Harish Singidi , Gianni Stephen Alsasua , Ashutosh Malshe , Kishore Kumar Muchherla , Vamsi Pavan Rayaprolu , Sampath Ratnam
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F11/07
- IPC: G06F11/07 ; G06F11/30
Abstract:
A system configured to determine that a trigger condition has occurred that is related to an operation performed on a memory device of the system. Responsive to determining that the trigger condition has occurred, reordering error handling mechanisms of an error handling sequence based upon an error handling mechanism performance metric. Each error handling mechanism specifies operations to be performed to recover an error in the operation on the memory device.
Public/Granted literature
- US20190278653A1 DYNAMIC ERROR HANDLING IN A MEMORY SYSTEM Public/Granted day:2019-09-12
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