Invention Grant
- Patent Title: Vertical decoders
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Application No.: US16998346Application Date: 2020-08-20
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Publication No.: US11145342B2Publication Date: 2021-10-12
- Inventor: Andrea Redaelli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C8/00
- IPC: G11C8/00 ; G11C8/10 ; G11C5/06 ; G11C5/02

Abstract:
Methods, systems, and devices for a decoder are described. The memory device may include a substrate, an array of memory cells coupled with the substrate, and a decoder coupled with the substrate. The decoder may include a doped material that may extend between a first conductive line and an access line of the array of memory cells in a first direction (e.g., away from a surface of the substrate) and the doped material may be configured to selectively couple the first conductive line of the decoder with the access line of the array of memory cells. The access line may be coupled with two decoders, in some cases.
Public/Granted literature
- US20200381030A1 VERTICAL DECODERS Public/Granted day:2020-12-03
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