Invention Grant
- Patent Title: Methods of performing chemical-mechanical polishing process in semiconductor devices
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Application No.: US16712430Application Date: 2019-12-12
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Publication No.: US11152255B2Publication Date: 2021-10-19
- Inventor: Shih-Kang Fu , Ming-Han Lee , Shau-Lin Shue
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/321 ; H01L23/535 ; H01L23/532

Abstract:
A method of forming a semiconductor structure includes removing a top portion of a conductive feature disposed in a first dielectric layer and over a semiconductor substrate to form a first recess, depositing a second dielectric layer over the first dielectric layer, where the second dielectric layer includes a first region disposed vertically above the first recess and a second region disposed adjacent the first region, and forming a third dielectric layer over the second dielectric layer. The method further includes subsequently forming openings in the third dielectric layer that extend to expose the second dielectric layer, depositing a conductive material in the openings, and planarizing the conductive material to form conductive features in the first and the second regions, where the planarizing completely removes portions of the third dielectric layer disposed in the second region.
Public/Granted literature
- US20200312708A1 Methods of Performing Chemical-Mechanical Polishing Process in Semiconductor Devices Public/Granted day:2020-10-01
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