Invention Grant
- Patent Title: Method and apparatus for eliminating EEPROM bit-disturb
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Application No.: US16822119Application Date: 2020-03-18
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Publication No.: US11170858B2Publication Date: 2021-11-09
- Inventor: Muhammad Sarwar , Vyankatesh Gupta , James McClay , Sundar Chetlur , Harianto Wong
- Applicant: Allegro MicroSystems, LLC
- Applicant Address: US NH Manchester
- Assignee: Allegro MicroSystems, LLC
- Current Assignee: Allegro MicroSystems, LLC
- Current Assignee Address: US NH Manchester
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/34 ; G11C16/14 ; G11C16/26 ; G01R33/09 ; G11C11/406 ; G11C11/4074 ; G11C5/05 ; G11C16/08

Abstract:
A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.
Public/Granted literature
- US20210295932A1 METHOD AND APPARATUS FOR ELIMINATING EEPROM BIT-DISTURB Public/Granted day:2021-09-23
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