Invention Grant
- Patent Title: Semiconductor package with electromagnetic interference shielding using metal layers and vias
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Application No.: US16069377Application Date: 2016-03-31
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Publication No.: US11189573B2Publication Date: 2021-11-30
- Inventor: Vijay K. Nair , Digvijay Raorane
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2016/025335 WO 20160331
- International Announcement: WO2017/171807 WO 20171005
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/00 ; H01L25/065 ; H01L23/48 ; H01L21/78 ; H01L23/498 ; H01L21/82

Abstract:
A semiconductor package is described herein with electromagnetic shielding using metal layers and vias. In one example, the package includes a silicon substrate having a front side and a back side, the front side including active circuitry and an array of contacts to attach to a substrate, a metallization layer over the back side of the die to shield active circuitry from interference through the back side, and a plurality of through-silicon vias coupled to the back side metallization at one end and to front side lands of the array of lands at the other end to shield active circuitry from interference through the sides of the die.
Public/Granted literature
- US20190019764A1 SEMICONDUCTOR PACKAGE WITH ELECTROMAGNETIC INTERFERENCE SHIELDING USING METAL LAYERS AND VIAS Public/Granted day:2019-01-17
Information query
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