Invention Grant
- Patent Title: Partially disposed gate layer into the trenches
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Application No.: US16570036Application Date: 2019-09-13
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Publication No.: US11189626B2Publication Date: 2021-11-30
- Inventor: Xiang-Zheng Bo , John H. MacPeak , Douglas T. Grider
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L27/11521
- IPC: H01L27/11521 ; H01L29/788 ; H01L29/06 ; H01L29/49 ; H01L29/10 ; H01L21/66 ; H01L21/311 ; H01L21/762 ; H01L21/768 ; H01L29/66 ; H01L29/423 ; H01L27/02 ; H01L21/28 ; H01L21/265 ; G01N21/95 ; G03F7/20
Abstract:
In accordance with some examples, a system comprises a substrate layer having an outer surface. The system also comprises a plurality of trenches extending from the outer surface into the substrate layer. The system then comprises a plurality of active regions with each active region positioned between a different pair of consecutive trenches of the plurality of trenches. The system also comprises a dielectric layer disposed in each of the plurality of trenches and on each of the plurality of active regions. The system then comprises a gate layer disposed on the dielectric layer and extending at least partially into each of the plurality of trenches.
Public/Granted literature
- US20200006362A1 PARTIALLY DISPOSED GATE LAYER INTO THE TRENCHES Public/Granted day:2020-01-02
Information query
IPC分类:
