Invention Grant
- Patent Title: Integrated circuit device with stacked dies having mirrored circuitry
-
Application No.: US16798267Application Date: 2020-02-21
-
Publication No.: US11205639B2Publication Date: 2021-12-21
- Inventor: Myongseob Kim , Henley Liu , Cheang Whang Chang
- Applicant: XILINX, INC.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L21/50
- IPC: H01L21/50 ; H01L25/065 ; H01L25/00

Abstract:
An integrated circuit device and techniques for manufacturing the same are described therein. The integrated circuit device leverages two or more pairs of stacked integrated circuit dies that are fabricated in mirror images to reduce the complexity of manufacturing, thus reducing cost. In one example, an integrated circuit device is provided that includes an integrated circuit (IC) die stack. The IC die stack includes first, second, third and fourth IC dies. The first and second IC dies are coupled by their active sides and include arrangements of integrated circuitry that are mirror images of each other. The third and fourth IC dies are also coupled by their active sides and include arrangements of integrated circuitry that are mirror images of each other.
Public/Granted literature
- US20210265312A1 INTEGRATED CIRCUIT DEVICE WITH STACKED DIES HAVING MIRRORED CIRCUITRY Public/Granted day:2021-08-26
Information query
IPC分类: