Invention Grant
- Patent Title: Transistors, memory structures and memory arrays containing two-dimensional materials between a source/drain region and a channel region
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Application No.: US16542078Application Date: 2019-08-15
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Publication No.: US11211487B2Publication Date: 2021-12-28
- Inventor: Kamal M. Karda , Chandra Mouli , Haitao Liu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/04 ; H01L27/108 ; H01L29/45 ; H01L29/08 ; H01L29/10 ; H01L29/267
Abstract:
Some embodiments include an integrated assembly having a semiconductor material with a more-doped region adjacent to a less-doped region. A two-dimensional material is between the more-doped region and a portion of the less-doped region. Some embodiments include an integrated assembly which contains a semiconductor material, a metal-containing material over the semiconductor material, and a two-dimensional material between a portion of the semiconductor material and the metal-containing material. Some embodiments include a transistor having a first source/drain region, a second source/drain region, a channel region between the first and second source/drain regions, and a two-dimensional material between the channel region and the first source; drain region.
Public/Granted literature
- US20210050443A1 Integrated Assemblies Containing Two-Dimensional Materials Public/Granted day:2021-02-18
Information query
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