- Patent Title: Method for manufacturing semiconductor device having thinned fins
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Application No.: US16707985Application Date: 2019-12-09
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Publication No.: US11217682B2Publication Date: 2022-01-04
- Inventor: Masaaki Shinohara
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2016-033597 20160224
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/11531 ; H01L29/423 ; H01L29/78 ; H01L21/8234 ; H01L21/308
Abstract:
Provided is a stable manufacturing method for a semiconductor device. In the manufacturing method for a semiconductor device, first, fins with an equal width are formed in each of a memory cell portion and a logic portion of a semiconductor substrate. Then, the fins in the logic portion are etched with the fins in the memory cell covered with a mask film, thereby fabricating fins in the logic portion, each of which is narrower than the fin formed in the memory cell portion.
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