Invention Grant
- Patent Title: Interconnect structure and methods thereof
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Application No.: US16047884Application Date: 2018-07-27
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Publication No.: US11222842B2Publication Date: 2022-01-11
- Inventor: Shang-Wen Chang , Yi-Hsiung Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L21/8234 ; H01L29/78 ; H01L21/311 ; H01L23/535 ; H01L29/417 ; H01L29/66

Abstract:
A method and structure for forming a local interconnect, without routing the local interconnect through an overlying metal layer. In various embodiments, a first dielectric layer is formed over a gate stack of at least one device and a second dielectric layer is formed over a contact metal layer of the at least one device. In various embodiments, a selective etching process is performed to remove the second dielectric layer and expose the contact metal layer, without substantial removal of the first dielectric layer. In some examples, a metal VIA layer is deposited over the at least one device. The metal VIA layer contacts the contact metal layer and provides a local interconnect structure. In some embodiments, a multi-level interconnect network overlying the local interconnect structure is formed.
Public/Granted literature
- US20180350738A1 Interconnect Structure and Methods Thereof Public/Granted day:2018-12-06
Information query
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