Invention Grant
- Patent Title: Normally-off transistor with reduced on-state resistance and manufacturing method
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Application No.: US16808311Application Date: 2020-03-03
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Publication No.: US11222969B2Publication Date: 2022-01-11
- Inventor: Ferdinando Iucolano , Alfonso Patti
- Applicant: STMICROELECTRONICS S.R.L.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed Intellectual Property Law Group LLP
- Priority: IT102015000076151 20151124
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/778 ; H01L29/423 ; H01L29/20 ; H01L29/10 ; H01L21/02 ; H01L29/205 ; H01L29/417

Abstract:
A normally-off electronic device, comprising: a semiconductor body including a heterostructure that extends over a buffer layer; a recessed-gate electrode, extending in a direction orthogonal to the plane; a first working electrode and a second working electrode at respective sides of the gate electrode; and an active area housing, in the on state, a conductive path for a flow of electric current between the first and second working electrodes. A resistive region extends at least in part in the active area that is in the buffer layer and is designed to inhibit the flow of current between the first and second working electrodes when the device is in the off state. The gate electrode extends in the semiconductor body to a depth at least equal to the maximum depth reached by the resistive region.
Information query
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