- Patent Title: Blocking systems from responding to bus mastering capable devices
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Application No.: US16482445Application Date: 2017-12-08
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Publication No.: US11226918B2Publication Date: 2022-01-18
- Inventor: Monji G Jabori , Wei Ze Liu
- Applicant: Hewlett-Packard Development Company, L.P.
- Applicant Address: US TX Spring
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Spring
- Agency: Trop Pruner & Hu PC
- International Application: PCT/US2017/065317 WO 20171208
- International Announcement: WO2019/112606 WO 20190613
- Main IPC: G06F13/364
- IPC: G06F13/364 ; G06F1/3215 ; G06F13/16 ; G06F13/40 ; G06F21/85
Abstract:
In some examples, a system includes a memory resource, a communication channel to allow a bus mastering capable device to access the memory resource, and a controller to block the system from responding to a request from the bus mastering capable device for accessing the memory resource until the controller has authorized the bus mastering capable device.
Public/Granted literature
- US20200320030A1 BLOCKING SYSTEMS FROM RESPONDING TO BUS MASTERING CAPABLE DEVICES Public/Granted day:2020-10-08
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