Invention Grant
- Patent Title: Data processing apparatus and memory protection method
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Application No.: US16411492Application Date: 2019-05-14
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Publication No.: US11237987B2Publication Date: 2022-02-01
- Inventor: Yasuhiro Sugita
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2018-115176 20180618
- Main IPC: G06F12/14
- IPC: G06F12/14 ; G06F12/0866

Abstract:
The data processing apparatus includes a memory protection setting storage unit capable of storing a plurality of address sections as memory protection setting targets, a plurality of first determination units provided for each of the address sections stored in the memory protection setting storage unit and provisionally determining whether or not an access request is permitted based on whether or not an access destination address specified by the access request corresponds to the address section acquired from the memory protection setting storage unit, and a second determination unit finally determining whether or not the access request is permitted based on the classification information and the results of provisional determinations by the first determination unit.
Public/Granted literature
- US20190384724A1 DATA PROCESSING APPARATUS AND MEMORY PROTECTION METHOD Public/Granted day:2019-12-19
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