Invention Grant
- Patent Title: Integrated assemblies
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Application No.: US16662705Application Date: 2019-10-24
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Publication No.: US11239181B2Publication Date: 2022-02-01
- Inventor: Rohit Kothari , Lifang Xu , Jian Li
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/1157
- IPC: H01L27/1157 ; H01L23/00 ; H01L23/522 ; H01L23/528 ; H01L27/11519 ; H01L27/11524 ; H01L27/11582 ; H01L27/11556 ; H01L27/11565 ; H01L27/11573 ; H01L27/11529

Abstract:
Some embodiments include an integrated assembly having a semiconductor die with memory array regions and one or more regions peripheral to the memory array regions. A stack of alternating insulative and conductive levels extends across the memory array regions and passes into at least one of the peripheral regions. The stack generates bending stresses on the die. At least one stress-moderating region extends through the stack and is configured to alleviate the bending stresses.
Public/Granted literature
- US20210125939A1 Integrated Assemblies Public/Granted day:2021-04-29
Information query
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