Invention Grant
- Patent Title: Semiconductor package structure and method for manufacturing the same
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Application No.: US16573672Application Date: 2019-09-17
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Publication No.: US11257776B2Publication Date: 2022-02-22
- Inventor: Yung-Sheng Lin , Chin-Li Kao , Hsu-Nan Fang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/16 ; H01L25/00 ; H01L25/18 ; H01L23/00

Abstract:
A semiconductor package structure includes a semiconductor die surface having a narrower pitch region and a wider pitch region adjacent to the narrower pitch region, a plurality of first type conductive pillars in the narrower pitch region, each of the first type conductive pillars having a copper-copper interface, and a plurality of second type conductive pillars in the wider pitch region, each of the second type conductive pillars having a copper-solder interface. A method for manufacturing the semiconductor package structure described herein is also disclosed.
Public/Granted literature
- US20210082853A1 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2021-03-18
Information query
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