Invention Grant
- Patent Title: Frequency synthesis with reference signal generated by opportunistic phase locked loop
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Application No.: US17066490Application Date: 2020-10-09
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Publication No.: US11264997B2Publication Date: 2022-03-01
- Inventor: Gil Horovitz , Sharon Malevsky , Evgeny Shumaker , Igal Kushnir
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: 2SPL Patent Attorneys PartG mbB
- Agent Yong Beom Hwang
- Main IPC: H03L7/099
- IPC: H03L7/099 ; H04B1/00

Abstract:
Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.
Public/Granted literature
- US20210050857A1 FREQUENCY SYNTHESIS WITH REFERENCE SIGNAL GENERATED BY OPPORTUNISTIC PHASE LOCKED LOOP Public/Granted day:2021-02-18
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