Invention Grant
- Patent Title: Systems and methods for junction termination in semiconductor devices
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Application No.: US16517222Application Date: 2019-07-19
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Publication No.: US11271076B2Publication Date: 2022-03-08
- Inventor: Stephen Daley Arthur , Victor Mario Torres , Michael J. Hartig , Reza Ghandi , David Alan Lilienfeld , Alexander Viktorovich Bolotnikov
- Applicant: General Electric Company
- Applicant Address: US NY Schenectady
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Schenectady
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L31/0312 ; H01L29/06 ; H01L29/16 ; H01L21/04 ; H01L29/66

Abstract:
The subject matter disclosed herein relates to semiconductor power devices and, more specifically, to junction termination designs for wide-bandgap (e.g., silicon carbide) semiconductor power devices. A disclosed semiconductor device includes a first epitaxial (epi) layer disposed on a substrate layer, wherein a termination area of the first epi layer has a minimized epi doping concentration of a first conductivity type (e.g., n-type). The device also includes a second epi layer disposed on the first epi layer, wherein a termination area of the second epi layer has the minimized epi doping concentration of the first conductivity type and includes a first plurality of floating regions of a second conductivity type (e.g., p-type) that form a first junction termination of the device.
Information query
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