Invention Grant
- Patent Title: Stiffener and package substrate for a semiconductor package
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Application No.: US15945641Application Date: 2018-04-04
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Publication No.: US11295998B2Publication Date: 2022-04-05
- Inventor: Stephen Christianson , Stephen Hall , Emile Davies-Venn , Dong-Ho Han , Kemal Aygun , Konika Ganguly , Jun Liao , M. Reza Zamani , Cory Mason , Kirankumar Kamisetty
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L23/16
- IPC: H01L23/16 ; H01L23/66 ; H01L23/00 ; H01P3/08 ; H01L21/48 ; H01P11/00

Abstract:
Techniques for fabricating a package substrate and/or a stiffener for a semiconductor package are described. For one technique, a package substrate comprises: a routing layer comprising a dielectric layer. A stiffener may be above the routing layer and a conductive line may be on the routing layer, the conductive line comprising first and second portions, the first portion having a first width, the second portion having a second width, the conductive line extending from a first region of the routing layer to a second region of the routing layer, the first region being under the stiffener, the second region being outside the stiffener, the first portion being on the first region, and the second portion being on the second region. One or more portions of the conductive line can be perpendicular to an edge of the stiffener. The perpendicular portion(s) may comprise a transition between the first and second widths.
Public/Granted literature
- US20190311963A1 STIFFENER AND PACKAGE SUBSTRATE FOR A SEMICONDUCTOR PACKAGE Public/Granted day:2019-10-10
Information query
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