- Patent Title: Integrated circuitry, memory arrays comprising strings of memory cells, methods used in forming integrated circuitry, and methods used in forming a memory array comprising strings of memory cells
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Application No.: US16856847Application Date: 2020-04-23
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Publication No.: US11302712B2Publication Date: 2022-04-12
- Inventor: Chandra Tiwari , Jivaan Kishore Jhothiraman
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11556 ; H01L21/02 ; H01L27/11565 ; H01L27/11519 ; H01L29/66 ; H01L21/311
Abstract:
A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises a cavity therein that comprises a stair-step structure. At least a portion of sidewalls of the cavity is lined with sacrificial material. Insulative material is formed in the cavity radially inward of the sacrificial material. At least some of the sacrificial material is removed from being between the cavity sidewalls and the insulative material to form a void space there-between. Insulator material is formed in at least some of the void space. Other embodiments, including structure independent of method, are disclosed.
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