Invention Grant
- Patent Title: System and method for flash and RAM allocation for reduced power consumption in a processor
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Application No.: US16992098Application Date: 2020-08-13
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Publication No.: US11307779B2Publication Date: 2022-04-19
- Inventor: Subba Reddy Kallam , Partha Sarathy Murali , Venkata Siva Prasad Pulagam , Anusha Biyyani , Venkatesh Vinjamuri , Shahabuddin Mohammed , Rahul Kumar Gurram , Akhil Soni
- Applicant: Redpine Signals, Inc.
- Applicant Address: US CA San Jose
- Assignee: Redpine Signals, Inc.
- Current Assignee: Redpine Signals, Inc.
- Current Assignee Address: US CA San Jose
- Agency: File-EE-Patents.com
- Agent Jay A. Chesavage
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/06

Abstract:
The present invention is an controller for dynamically allocating RAM between powersave code copied from ROM and transient RAM memory used for storing packets. When the utilization of the transient RAM memory is low, code segments are copied from ROM and executed from RAM using a RAM pointer table which is updated after the code segments are copied over from ROM, and when the utilization of the transient RAM memory is high, code segments are deallocated from RAM and the pointer table is updated to point to the corresponding location in flash ROM.
Public/Granted literature
- US20210072906A1 System and Method for Flash and RAM allocation for Reduced Power Consumption in a Processor Public/Granted day:2021-03-11
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