Invention Grant
- Patent Title: Power management for memory device
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Application No.: US16733911Application Date: 2020-01-03
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Publication No.: US11314301B2Publication Date: 2022-04-26
- Inventor: Hari Giduturi
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F13/16

Abstract:
Methods, systems, and devices for power management of a memory device are described. An apparatus may include a substrate and an input/output (I/O) interface and memory device coupled with the substrate. The I/O interface may communicate with a host device and the memory device may store data associated with the host device. The apparatus may include a power management component for providing one or more supply voltages to the memory device. The power management component may receive input voltages associated with the substrate and provide the supply voltages to the memory device based on the input voltages. The power management component may include a first portion integrated with the memory device and a second portion coupled with the substrate. The first portion may include control circuitry for the power management component and the second portion may include passive components for the power management component.
Public/Granted literature
- US20210208653A1 POWER MANAGEMENT FOR MEMORY DEVICE Public/Granted day:2021-07-08
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