Invention Grant
- Patent Title: Channel structures for thin-film transistors
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Application No.: US16142045Application Date: 2018-09-26
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Publication No.: US11335789B2Publication Date: 2022-05-17
- Inventor: Abhishek Sharma , Cory Weber , Van H. Le , Sean Ma
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/47
- IPC: H01L29/47 ; H01L29/66 ; H01L29/45 ; H01L29/786 ; H01L27/108 ; H01L27/24 ; H01L29/423

Abstract:
Embodiments herein describe techniques for a thin-film transistor (TFT) above a substrate. The transistor includes a gate electrode above the substrate, and a channel layer above the substrate, separated from the gate electrode by a gate dielectric layer. The transistor further includes a contact electrode above the channel layer and in contact with a contact area of the channel layer. The contact area has a thickness determined based on a Schottky barrier height of a Schottky barrier formed at an interface between the contact electrode and the contact area, a doping concentration of the contact area, and a contact resistance at the interface between the contact electrode and the contact area. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20200098880A1 CHANNEL STRUCTURES FOR THIN-FILM TRANSISTORS Public/Granted day:2020-03-26
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