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    TRANSISTORS WITH SOURCE & DRAIN ETCH STOP
    2.
    发明申请
    TRANSISTORS WITH SOURCE & DRAIN ETCH STOP 有权

    公开(公告)号：US20220415708A1

    公开(公告)日：2022-12-29

    申请号：US17358903

    申请日：2021-06-25

    Applicant: Intel Corporation

    Inventor： Rishabh Mehandru ,  Stephen Cea ,  Tahir Ghani ,  Patrick Keys ,  Aaron Lilak ,  Anand Murthy ,  Cory Weber

    IPC: H01L21/768 ,  H01L29/10 ,  H01L27/088 ,  H01L25/07 ,  H01L29/66 ,  H01L29/78

    Abstract: Integrated circuitry comprising transistor structures with a source/drain etch stop layer to limit the depth of source and drain material relative to a channel of the transistor. A portion of a channel material layer may be etched in preparation for source and drain materials. The etch may be stopped at an etch stop layer buried between a channel material layer and an underlying planar substrate layer. The etch stop layer may have a different composition than the channel layer while retaining crystallinity of the channel layer. The source and drain etch stop layer may provide adequate etch selectivity to ensure a source and drain etch process does not punch through the etch stop layer. Following the etch process, source and drain materials may be formed, for example with an epitaxial growth process. The source and drain etch stop layer may be, for example, primarily silicon and carbon.

    Forksheet transistors with dielectric or conductive spine
    5.
    发明授权
    Forksheet transistors with dielectric or conductive spine 有权

    公开(公告)号：US11923370B2

    公开(公告)日：2024-03-05

    申请号：US17030226

    申请日：2020-09-23

    Applicant: Intel Corporation

    Inventor： Seung Hoon Sung ,  Cheng-Ying Huang ,  Marko Radosavljevic ,  Christopher M. Neumann ,  Susmita Ghose ,  Varun Mishra ,  Cory Weber ,  Stephen M. Cea ,  Tahir Ghani ,  Jack T. Kavalieros

    IPC: H01L27/12 ,  H01L21/84

    CPC classification number: H01L27/1203 ,  H01L21/84

    Abstract: Embodiments disclosed herein include forksheet transistor devices having a dielectric or a conductive spine. For example, an integrated circuit structure includes a dielectric spine. A first transistor device includes a first vertical stack of semiconductor channels spaced apart from a first edge of the dielectric spine. A second transistor device includes a second vertical stack of semiconductor channels spaced apart from a second edge of the dielectric spine. An N-type gate structure is on the first vertical stack of semiconductor channels, a portion of the N-type gate structure laterally between and in contact with the first edge of the dielectric spine and the first vertical stack of semiconductor channels. A P-type gate structure is on the second vertical stack of semiconductor channels, a portion of the P-type gate structure laterally between and in contact with the second edge of the dielectric spine and the second vertical stack of semiconductor channels.

    Channel structures for thin-film transistors
    8.
    发明授权
    Channel structures for thin-film transistors 有权

    公开(公告)号：US11335789B2

    公开(公告)日：2022-05-17

    申请号：US16142045

    申请日：2018-09-26

    Applicant: Intel Corporation

    Inventor： Abhishek Sharma ,  Cory Weber ,  Van H. Le ,  Sean Ma

    IPC: H01L29/47 ,  H01L29/66 ,  H01L29/45 ,  H01L29/786 ,  H01L27/108 ,  H01L27/24 ,  H01L29/423

    Abstract: Embodiments herein describe techniques for a thin-film transistor (TFT) above a substrate. The transistor includes a gate electrode above the substrate, and a channel layer above the substrate, separated from the gate electrode by a gate dielectric layer. The transistor further includes a contact electrode above the channel layer and in contact with a contact area of the channel layer. The contact area has a thickness determined based on a Schottky barrier height of a Schottky barrier formed at an interface between the contact electrode and the contact area, a doping concentration of the contact area, and a contact resistance at the interface between the contact electrode and the contact area. Other embodiments may be described and/or claimed.

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