Invention Grant
- Patent Title: Integrated fan-out package and manufacturing method thereof
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Application No.: US16914478Application Date: 2020-06-29
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Publication No.: US11355461B2Publication Date: 2022-06-07
- Inventor: Chi-Yang Yu , Chin-Liang Chen , Hai-Ming Chen , Kuan-Lin Ho , Yu-Min Liang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/00 ; H01L21/56 ; H01L23/31 ; H01L23/522 ; H01L23/532 ; H01L21/683

Abstract:
An integrated fan-out package includes a die, an encapsulant, a seed layer, a conductive pillar, a redistribution structure, and a buffer layer. The encapsulant encapsulates the die. The seed layer and the conductive pillar are sequentially stacked over the die and the encapsulant. The redistribution structure is over the die and the encapsulant. The redistribution structure includes a conductive pattern and a dielectric layer. The conductive pattern is directly in contact with the seed layer and the dielectric layer covers the conductive pattern and surrounds the seed layer and the conductive pillar. The buffer layer is disposed over the redistribution structure. The seed layer is separate from the dielectric layer by the buffer layer, and a Young's modulus of the buffer layer is higher than a Young's modulus of the dielectric layer of the redistribution structure.
Public/Granted literature
- US20200328173A1 INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-10-15
Information query
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