Invention Grant
- Patent Title: Tier-aware read and write
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Application No.: US15640943Application Date: 2017-07-03
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Publication No.: US11366588B2Publication Date: 2022-06-21
- Inventor: Francesc Guim Bernat , Nicolae O. Popovici , Charles A. Giefer , Gaspar Mora Porta , Thomas Willhalm
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Main IPC: G06F3/06
- IPC: G06F3/06 ; H04L69/22 ; H04L67/1097 ; H04L67/61

Abstract:
A fabric interface apparatus, including: a fabric interface logic to communicatively couple to a fabric; a data interface to communicatively couple to a compute platform including memory resources in at least two memory tiers; and a tier-aware read/write engine (TARWE) to: receive an incoming packet via the fabric; parse a header of the incoming packet to identify a hint for directing the incoming packet to a preferred memory tier; and write the incoming packet to the preferred memory tier.
Public/Granted literature
- US20190004701A1 Tier-Aware Read and Write Public/Granted day:2019-01-03
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