Invention Grant
- Patent Title: Resistive memory device with boundary and edge transistors coupled to edge bit lines
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Application No.: US17014480Application Date: 2020-09-08
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Publication No.: US11380392B2Publication Date: 2022-07-05
- Inventor: Makoto Hirano
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: KR10-2019-0161668 20191206
- Main IPC: G11C13/00
- IPC: G11C13/00

Abstract:
A resistive memory device includes a first bit line group including a first edge bit line, a second bit line group including a second edge bit line, and a first boundary transistor configured to apply a non-selection voltage to the second edge bit line according to a selection of the first edge bit line. The first edge bit line of the first bit line group is disposed closest to the second bit line group, and the second edge bit line of the second bit line group is disposed closest to the first bit line group.
Public/Granted literature
- US20210174869A1 RESISTIVE MEMORY DEVICE Public/Granted day:2021-06-10
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