Invention Grant
- Patent Title: Host accelerated operations in managed NAND devices
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Application No.: US17051995Application Date: 2019-05-15
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Publication No.: US11409651B2Publication Date: 2022-08-09
- Inventor: Sebastien Andre Jean , Greg A. Blodgett
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- International Application: PCT/US2019/032463 WO 20190515
- International Announcement: WO2019/222381 WO 20191121
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F3/06 ; G06F12/14

Abstract:
Devices and techniques for host accelerated operations in managed NAND devices are described herein. A host logical-to-physical (L2P) table of the NAND device has an associated map. Entries in the map correspond to one or more logical addresses (LA) and indicate whether the host L2P table is current for those LAs. If the table is not current, then a request will bypass the host L2P table, using a standard device L2P lookup instead. Otherwise, the host L2P table can be used.
Public/Granted literature
- US20210240608A1 HOST ACCELERATED OPERATIONS IN MANAGED NAND DEVICES Public/Granted day:2021-08-05
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