- 专利标题： Scan optimization from stacking multiple reliability specifications
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申请号： US17141964申请日： 2021-01-05
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公开(公告)号： US11417405B2公开(公告)日： 2022-08-16
- 发明人: Ankit Vinod Vashi , Harish Reddy Singidi , Kishore Kumar Muchherla
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Schwegman Lundberg & Woessner, P.A.
- 主分类号： G11C16/34
- IPC分类号： G11C16/34 ; G11C11/406 ; G11C16/26 ; G11C29/10 ; G06F11/00 ; G11C16/10
摘要：
A variety of applications can include systems and/or methods of optimizing results from scanning a memory device, where the memory device has stacked multiple reliability specifications. Information about a block of multiple blocks of a memory device can be logged, where the information is associated with a combination of reliability specifications. A refresh of the block can be triggered based on exceeding a threshold condition for the combination of reliability specifications.