公开(公告)号：US11488670B2

公开(公告)日：2022-11-01

申请号：US17181826

申请日：2021-02-22

申请人： Micron Technology, Inc.

发明人： Xiangang Luo ,  Jianmin Huang ,  Jung Sheng Hoei ,  Harish Reddy Singidi ,  Ting Luo ,  Ankit Vinod Vashi

IPC分类号： G11C16/10 ,  G11C16/34 ,  G11C7/04

摘要： Devices and techniques temperature sensitive NAND programming are disclosed herein. A device controller can receive a command to write data to a component of the device. A temperature can be obtained in response to the command, and the temperature can be combined with a temperature compensation value to calculate a verification level. The command can then be executed in accordance with the verification level.

公开(公告)号：US11567682B2

公开(公告)日：2023-01-31

申请号：US16685300

申请日：2019-11-15

申请人： Micron Technology, Inc.

发明人： Ting Luo ,  Ankit Vinod Vashi ,  Xiangang Luo ,  Jianmin Huang

IPC分类号： G06F3/06

摘要： Techniques disclosed herein can be used to improve cross-temperature coverage of memory devices and improve memory device reliability in cross-temperature conditions. More specifically, a memory trim set can be selected from multiple candidate memory trim sets when performing a memory operation (such as a memory write operation), based on a temperature metric and a P/E cycle metric for the memory device. The candidate memory trim sets include multiple respective memory trim values (e.g., memory configuration parameters, such as program voltage step size, program pulse width, program verify level, etc., as discussed above) for performing the memory operation. The temperature metric can be indicative of a temperature of at least a region of the memory device (e.g., the entire device, a memory plane, a memory block, etc.), and the P/E cycle metric can be indicative of a number of P/E cycles performed by the memory device within a selected time interval.

公开(公告)号：US10930352B2

公开(公告)日：2021-02-23

申请号：US16601275

申请日：2019-10-14

申请人： Micron Technology, Inc.

发明人： Xiangang Luo ,  Jianmin Huang ,  Jung Sheng Hoei ,  Harish Reddy Singidi ,  Ting Luo ,  Ankit Vinod Vashi

IPC分类号： G11C16/10 ,  G11C16/34 ,  G11C7/04

摘要： Devices and techniques temperature sensitive NAND programming are disclosed herein. A device controller can receive a command to write data to a component of the device. A temperature can be obtained in response to the command, and the temperature can be combined with a temperature compensation value to calculate a verification level. The command can then be executed in accordance with the verification level.

公开(公告)号：US20210149564A1

公开(公告)日：2021-05-20

申请号：US16685300

申请日：2019-11-15

申请人： Micron Technology, Inc.

发明人： Ting Luo ,  Ankit Vinod Vashi ,  Xiangang Luo ,  Jianmin Huang

IPC分类号： G06F3/06

摘要： Techniques disclosed herein can be used to improve cross-temperature coverage of memory devices and improve memory device reliability in cross-temperature conditions. More specifically, a memory trim set can be selected from multiple candidate memory trim sets when performing a memory operation (such as a memory write operation), based on a temperature metric and a P/E cycle metric for the memory device. The candidate memory trim sets include multiple respective memory trim values (e.g., memory configuration parameters, such as program voltage step size, program pulse width, program verify level, etc., as discussed above) for performing the memory operation. The temperature metric can be indicative of a temperature of at least a region of the memory device (e.g., the entire device, a memory plane, a memory block, etc.), and the P/E cycle metric can be indicative of a number of P/E cycles performed by the memory device within a selected time interval.

公开(公告)号：US20210125675A1

公开(公告)日：2021-04-29

申请号：US17141964

申请日：2021-01-05

申请人： Micron Technology, Inc.

发明人： Ankit Vinod Vashi ,  Harish Reddy Singidi ,  Kishore Kumar Muchherla

IPC分类号： G11C16/34 ,  G11C11/406 ,  G11C16/26 ,  G11C29/10 ,  G06F11/00 ,  G11C16/10

摘要： A variety of applications can include systems and/or methods of optimizing results from scanning a memory device, where the memory device has stacked multiple reliability specifications. Information about a block of multiple blocks of a memory device can be logged, where the information is associated with a combination of reliability specifications. A refresh of the block can be triggered based on exceeding a threshold condition for the combination of reliability specifications. Additional apparatus, systems, and methods are disclosed.

公开(公告)号：US11417405B2

公开(公告)日：2022-08-16

申请号：US17141964

申请日：2021-01-05

申请人： Micron Technology, Inc.

发明人： Ankit Vinod Vashi ,  Harish Reddy Singidi ,  Kishore Kumar Muchherla

IPC分类号： G11C16/34 ,  G11C11/406 ,  G11C16/26 ,  G11C29/10 ,  G06F11/00 ,  G11C16/10

摘要： A variety of applications can include systems and/or methods of optimizing results from scanning a memory device, where the memory device has stacked multiple reliability specifications. Information about a block of multiple blocks of a memory device can be logged, where the information is associated with a combination of reliability specifications. A refresh of the block can be triggered based on exceeding a threshold condition for the combination of reliability specifications.

公开(公告)号：US20200043555A1

公开(公告)日：2020-02-06

申请号：US16601275

申请日：2019-10-14

申请人： Micron Technology, Inc.

发明人： Xiangang Luo ,  Jianmin Huang ,  Jung Sheng Hoei ,  Harish Reddy Singidi ,  Ting Luo ,  Ankit Vinod Vashi

IPC分类号： G11C16/10 ,  G11C7/04 ,  G11C16/34

摘要： Devices and techniques temperature sensitive NAND programming are disclosed herein. A device controller can receive a command to write data to a component of the device. A temperature can be obtained in response to the command, and the temperature can be combined with a temperature compensation value to calculate a verification level. The command can then be executed in accordance with the verification level.