Invention Grant
- Patent Title: Zinc layer for a semiconductor die pillar
-
Application No.: US15909679Application Date: 2018-03-01
-
Publication No.: US11443996B2Publication Date: 2022-09-13
- Inventor: Nazila Dadvand , Keith Edward Johnson , Christopher Daniel Manack , Salvatore Frank Pavone
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Dawn Jos; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L25/065 ; H01L23/00 ; H01L21/56

Abstract:
A method for fabricating a copper pillar. The method includes forming a layer of titanium tungsten (TiW) over a semiconductor wafer, forming a layer of zinc (Zn) over the layer of TiW, and forming a copper pillar over the via. In addition, the method includes performing an anneal to diffuse the layer of Zn into the copper pillar. A semiconductor device that includes a layer of TiW coupled to a via of a semiconductor wafer and a copper pillar coupled to the layer of TiW. The copper pillar has interdiffused Zn within its bottom portion. Another method for fabricating a copper pillar includes forming a layer of TiW over a semiconductor wafer, forming a first patterned photoresist, forming a layer of Zn, and then removing the first patterned photoresist. The method further includes forming a second patterned photoresist and forming a copper pillar.
Public/Granted literature
- US20190109062A1 Zinc Layer For A Semiconductor Die Pillar Public/Granted day:2019-04-11
Information query
IPC分类: