Invention Grant
- Patent Title: Memory scaling semiconductor device
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Application No.: US17244527Application Date: 2021-04-29
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Publication No.: US11444062B2Publication Date: 2022-09-13
- Inventor: Nagesh Vodrahalli
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. Once bonded, respective inactive surfaces of the wafers may be thinned and then the die pairs diced from the wafers to form a completed memory module. When the wafers are bonded face to face, they compensate each other, mechanically resulting in the die pair having a minimum warpage.
Public/Granted literature
- US20210249385A1 MEMORY SCALING SEMICONDUCTOR DEVICE Public/Granted day:2021-08-12
Information query
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