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公开(公告)号:US20210104493A1
公开(公告)日:2021-04-08
申请号:US16594716
申请日:2019-10-07
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. Once bonded, respective inactive surfaces of the wafers may be thinned and then the die pairs diced from the wafers to form a completed memory module. When the wafers are bonded face to face, they compensate each other, mechanically resulting in the die pair having a minimum warpage.
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公开(公告)号:US11094674B2
公开(公告)日:2021-08-17
申请号:US16816466
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level, mechanically resulting in the die pair having a minimum warpage. An electronic component may be bonded to an exposed surface of one of the semiconductor dies.
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公开(公告)号:US11011500B2
公开(公告)日:2021-05-18
申请号:US16816495
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Chih Yang Li , Srinivasan Sivaram , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.
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公开(公告)号:US20210104494A1
公开(公告)日:2021-04-08
申请号:US16816466
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level, mechanically resulting in the die pair having a minimum warpage. An electronic component may be bonded to an exposed surface of one of the semiconductor dies.
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公开(公告)号:US11444062B2
公开(公告)日:2022-09-13
申请号:US17244527
申请日:2021-04-29
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. Once bonded, respective inactive surfaces of the wafers may be thinned and then the die pairs diced from the wafers to form a completed memory module. When the wafers are bonded face to face, they compensate each other, mechanically resulting in the die pair having a minimum warpage.
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公开(公告)号:US20210249385A1
公开(公告)日:2021-08-12
申请号:US17244527
申请日:2021-04-29
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. Once bonded, respective inactive surfaces of the wafers may be thinned and then the die pairs diced from the wafers to form a completed memory module. When the wafers are bonded face to face, they compensate each other, mechanically resulting in the die pair having a minimum warpage.
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公开(公告)号:US20210104495A1
公开(公告)日:2021-04-08
申请号:US16816495
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Chih Yang Li , Srinivasan Sivaram , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.
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公开(公告)号:US11004829B2
公开(公告)日:2021-05-11
申请号:US16594716
申请日:2019-10-07
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. Once bonded, respective inactive surfaces of the wafers may be thinned and then the die pairs diced from the wafers to form a completed memory module. When the wafers are bonded face to face, they compensate each other, mechanically resulting in the die pair having a minimum warpage.
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