Invention Grant
- Patent Title: Logical transport over a fixed PCIE physical transport network
-
Application No.: US16053384Application Date: 2018-08-02
-
Publication No.: US11477049B2Publication Date: 2022-10-18
- Inventor: Millind Mittal , Kiran S. Puranik , Jaideep Dastidar
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H04L12/54
- IPC: H04L12/54 ; H04L69/22 ; H04L12/70

Abstract:
A method and a system for transparently overlaying a logical transport network over an existing physical transport network is disclosed. The system designates a virtual channel located in a first transaction layer of a network conforming to a first network protocol. The system assembles a transaction layer packet in a second logical transaction layer of a second network protocol that is also recognizable by the first transaction layer. The system transfers the transaction layer packet from the second transaction layer to the virtual channel. The system transmits the transaction layer packet over the first transaction layer using the designated virtual channel over the network.
Public/Granted literature
- US20200044895A1 LOGICAL TRANSPORT OVER A FIXED PCIE PHYSICAL TRANSPORT NETWORK Public/Granted day:2020-02-06
Information query