Invention Grant
- Patent Title: Semiconductor device with multi-threshold gate structure
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Application No.: US16785919Application Date: 2020-02-10
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Publication No.: US11489056B2Publication Date: 2022-11-01
- Inventor: Chung-Liang Cheng , Peng-Soon Lim , Ziwei Fang , Huang-Lin Chao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L21/28 ; H01L21/8238 ; H01L29/06 ; H01L29/49 ; H01L29/66 ; H01L27/092 ; B82Y10/00

Abstract:
The present disclosure describes a semiconductor device that includes a substrate and a first transistor on the substrate. The first transistor includes a first gate structure and the first gate structure includes a gate dielectric layer and a first work function layer on the gate dielectric layer. The first gate structure also includes a capping layer on the first work function layer. The semiconductor device also includes a second transistor on the substrate, in which the second transistor includes a second gate structure. The second gate structure includes the gate dielectric layer and a second work function layer on the gate dielectric layer. The second gate structure also includes the first work function layer on the second work function layer and the silicon capping layer on the first work function layer.
Public/Granted literature
- US20210249517A1 SEMICONDUCTOR DEVICE WITH MULTI-THRESHOLD GATE STRUCTURE Public/Granted day:2021-08-12
Information query
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