Invention Grant
- Patent Title: Lithography method using multi-scale simulation, semiconductor device manufacturing method and exposure equipment
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Application No.: US16593149Application Date: 2019-10-04
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Publication No.: US11493850B2Publication Date: 2022-11-08
- Inventor: Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2019-0089212 20190723
- Main IPC: G03F7/20
- IPC: G03F7/20 ; H01L21/027 ; G05B19/4097

Abstract:
There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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