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公开(公告)号：US11621381B2
公开(公告)日：2023-04-04
申请号：US16678106
申请日：2019-11-08
发明人： Byunghoon Lee , Jamyeong Koo
IPC分类号： H01L33/62 , H01L25/075
摘要： A micro-LED mounting structure includes a first layer having a conductive pad disposed on a surface thereof, a second layer including a first surface, a second surface opposite the first surface and disposed on the surface of the first layer, and a via-hole extending from the conductive pad of the first layer to the first surface and including a conductive material, and a micro-LED disposed on the first surface of the second layer to be electrically connected with the conductive material included in the via-hole. The via-hole includes a first opening in the first surface of the second layer and in which the conductive material is formed, the conductive material of the first surface provides a conductive area on a portion of the first surface of the second layer, and the conductive area and an area within a specified area of the conductive area define a substantially flat surface.
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公开(公告)号：US12032281B2
公开(公告)日：2024-07-09
申请号：US17889472
申请日：2022-08-17
发明人： Byunghoon Lee , Jin Goo Park , Tae-Gon Kim , Sanguk Park , Changyoung Jeong , Jinho Ahn , Hyun-tae Kim
CPC分类号： G03F1/82 , B08B7/0028 , B08B11/02 , B08B13/00 , G03F7/70925
摘要： A pellicle cleaning apparatus includes a stage to support a pellicle, a particle remover above the stage, the particle remover being configured to remove a particle from a first surface of a pellicle, and the particle remover including a cantilever, and an adhesive material on a bottom surface of the cantilever, and a pressure controller adjacent to the stage, the pressure controller being configured to control a pressure of a fluid on a second surface of the pellicle.
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公开(公告)号：US11417627B2
公开(公告)日：2022-08-16
申请号：US16992004
申请日：2020-08-12
发明人： Jamyeong Koo , Sungyong Min , Byunghoon Lee , Changjoon Lee , Changkyu Chung , Youngkyong Jo
IPC分类号： H01L23/00 , H01L25/16 , H01L25/075 , H01L25/00
摘要： A micro LED display manufacturing method according to various embodiments may include: a first operation of bonding an anisotropic conductive film including a plurality of conductive particles onto one surface of a prepared substrate, the one surface including a circuit part; a second operation of forming a bonding layer on the anisotropic conductive film; a third operation of positioning a plurality of micro LED chips above the bonding layer, the micro LED chips being arranged on a carrier substrate while being spaced a first distance apart from the substrate; a fourth operation of attaching the plurality of micro LED chips onto the bonding layer by means of laser transfer; and a fifth operation of forming a conductive structure for electrically connecting a connection pad to the circuit part through the conductive particles by means of heating and pressurizing.
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公开(公告)号：US20210026249A1
公开(公告)日：2021-01-28
申请号：US16593149
申请日：2019-10-04
发明人： Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC分类号： G03F7/20 , G05B19/4097 , H01L21/027
摘要： There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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公开(公告)号：US11893196B2
公开(公告)日：2024-02-06
申请号：US17833107
申请日：2022-06-06
发明人： Jeonggyu Jo , Jungchul An , Byunghoon Lee
CPC分类号： G06F3/046 , B32B3/30 , B32B7/12 , B32B2307/732 , B32B2457/208 , G06F2203/04102
摘要： An electronic device including a bonding layer in contact with an active area of a digitizer may include: the digitizer, a main magnet attached to a surface of the digitizer, a flexible printed circuit board electrically connected to the digitizer, and a bonding layer connecting the digitizer and the flexible printed circuit board, wherein the flexible printed circuit board includes a base part overlapping the bonding layer with respect to a stacking direction of the digitizer, the flexible printed circuit board, and the bonding layer, and extension parts extending toward the main magnet from the base part.
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公开(公告)号：US11662665B2
公开(公告)日：2023-05-30
申请号：US17672937
申请日：2022-02-16
发明人： Byunghoon Lee , Maenghyo Cho , Changyoung Jeong , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee
IPC分类号： G03F7/20 , H01L21/027 , G03F7/40 , G05B19/4099 , G06F30/25
CPC分类号： G03F7/705 , G03F7/40 , G03F7/70033 , G03F7/70608 , G05B19/4099 , G06F30/25 , H01L21/0274 , G05B2219/45031
摘要： A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.
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公开(公告)号：US11309645B2
公开(公告)日：2022-04-19
申请号：US17061461
申请日：2020-10-01
发明人： Minki Kim , Byunghoon Lee , Min Park , Sungtae Park , Jungmin Park , Yongjae Song , Hongshin Shin , Woosung Jang , Chulwoo Park , Chihyun Cho
摘要： An electronic device includes a housing; a first circuit board, and a flexible circuit board. The first circuit board is disposed in an internal space of the housing and includes a plurality of first conductive terminals. The flexible circuit board includes a first connection portion including a plurality of second conductive terminals configured to connect to the plurality of first conductive terminals. The flexible circuit board also includes a connection portion extended from the first connection portion, and at least one conductive layer extended from the connection portion to at least a portion of the first connection portion. Additionally, the flexible circuit board includes at least one transmissive area in which light may be transmitted and the at least one conductive layer is at least partially omitted. At least some of the plurality of second conductive terminals are visible from the outside through the at least one transmissive area.
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公开(公告)号：US20210005796A1
公开(公告)日：2021-01-07
申请号：US16914863
申请日：2020-06-29
发明人： Sungyong Min , Byunghoon Lee , Changjoon Lee , Kyungwoon Jang , Changkyu Chung
摘要： A method of manufacturing a micro light emitting diode (LED) display module. The method of manufacturing a micro LED display module may include: pressing a plurality of micro LEDs disposed on a substrate to which an adhesive layer is applied, to electrically connect the plurality of micro LEDs to electrode pads of the substrate; performing testing to detect whether at least one of the plurality of micro LEDs is defective in a state in which the plurality of micro LEDs are pressurized and the adhesive layer is uncured; and based on detecting that at least one of the plurality of micro LEDs is defective, performing control to harden the adhesive layer.
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公开(公告)号：US12072637B2
公开(公告)日：2024-08-27
申请号：US17971297
申请日：2022-10-21
发明人： Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC分类号： G03F7/00 , G05B19/4097 , H01L21/027
CPC分类号： G03F7/705 , G05B19/4097 , H01L21/0273 , G05B2219/45028
摘要： There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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10.发明公开公开(公告)号：US20240036460A1
公开(公告)日：2024-02-01
申请号：US18186994
申请日：2023-03-21
发明人： MUN JA KIM , Seung Hyun Lee , Jae Sun Jung , Byungchul Yoo , Byunghoon Lee , Changyoung Jeong , Deok Hyun Kim , Deok Hyun Cho
IPC分类号： G03F1/62
CPC分类号： G03F1/62
摘要： Provided herein are protective membranes for lithography that include a core layer including carbon, an interface layer on the core layer, and a protective layer on the interface layer. The interface layer includes a reactive group bonded to a carbon atom of the core layer and the reactive group includes oxygen or nitrogen. The protective layer includes an element “M”, and the element “M” is bonded to the oxygen or nitrogen of the reactive group.
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