Managing dielectric stress of a memory device using controlled ramping slopes
摘要:
Control logic in a memory device identifies a request to execute a memory access operation on the memory cell. A first set of pulses corresponding to a first voltage ramp slope level is caused to be applied to the memory cell during a first time interval of the memory access operation. The control logic causes a second set of pulses corresponding to a second voltage ramp slope level to be applied to the memory cell during a second time interval of the execution of the memory access operation, wherein the first slope level and the second slope level are different.
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